SPACE VECTOR MODULATION FOR THREE-LEG VOLTAGE SOURCE INVERTERS

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THREE-LEG VOLTAGE SOURCE INVERTER

The topology of a three-leg voltage source inverter is Because

of the constraint that the input lines must never be shorted and the output current must

always be continuous a voltage source inverter can assume only eight distinct topologies.

These topologies are shown on Fig. 2.2. Six out of these eight topologies produce a nonzero

output voltage and are known as non-zero switching states and the remaining two

topologies produce zero output voltage and are known as zero switching states.

SPACE VECTOR MODULATION

The desired three phase voltages at the output of the inverter could be represented

by an equivalent vector V rotating in the counter clock wise direction as shown in Fig.

2.6(a). The magnitude of this vector is related to the magnitude of the output voltage (Fig.

2.6(b)) and the time this vector takes to complete one revolution is the same as the

fundamental time period of the output voltage.

RIGHT ALIGNED SEQUENCE (SVM1)

A simple way to synthesize the output voltage vector is to turn-on all the bottom

(or top) switches at the beginning of switching cycle and then to turn them off

sequentially so that the zero vector is split between V7(ppp) and V8(nnn) equally. This

switching scheme is shown in Fig. 2.8 for two sampling periods. The signals in the figure

represent the gating signals to the upper legs of the inverter. The scheme has three switch

turn-on’s and three switch turn-off’s within a switching cycle. The performance of the left

aligned sequence, where the sequence of vectors is exactly opposite to the right aligned

sequence, is expected to be similar to the right aligned sequence.

Alternating Zero Vector Sequence (SVM3)

In this scheme, known as DI sequence in literature [6], the zero vectors V7(ppp)

and V8(nnn) are used alternatively in adjacent cycles so that the effective switching

frequency is halved

[30929]

THREE-LEG VOLTAGE SOURCE INVERTER

The topology of a three-leg voltage source inverter is Because

of the constraint that the input lines must never be shorted and the output current must

always be continuous a voltage source inverter can assume only eight distinct topologies.

These topologies are shown on Fig. 2.2. Six out of these eight topologies produce a nonzero

output voltage and are known as non-zero switching states and the remaining two

topologies produce zero output voltage and are known as zero switching states.

SPACE VECTOR MODULATION

The desired three phase voltages at the output of the inverter could be represented

by an equivalent vector V rotating in the counter clock wise direction as shown in Fig.

2.6(a). The magnitude of this vector is related to the magnitude of the output voltage (Fig.

2.6(b)) and the time this vector takes to complete one revolution is the same as the

fundamental time period of the output voltage.

RIGHT ALIGNED SEQUENCE (SVM1)

A simple way to synthesize the output voltage vector is to turn-on all the bottom

(or top) switches at the beginning of switching cycle and then to turn them off

sequentially so that the zero vector is split between V7(ppp) and V8(nnn) equally. This

switching scheme is shown in Fig. 2.8 for two sampling periods. The signals in the figure

represent the gating signals to the upper legs of the inverter. The scheme has three switch

turn-on’s and three switch turn-off’s within a switching cycle. The performance of the left

aligned sequence, where the sequence of vectors is exactly opposite to the right aligned

sequence, is expected to be similar to the right aligned sequence.

Alternating Zero Vector Sequence (SVM3)

In this scheme, known as DI sequence in literature [6], the zero vectors V7(ppp)

and V8(nnn) are used alternatively in adjacent cycles so that the effective switching

frequency is halved